Synopsys Unveils High-Capacity Verification Systems with AMD Technology

2025-02-13 embedded

Munich, Thursday, 13 February 2025.
Synopsys launched new systems, including HAPS-200 and ZeBu-200, enhancing hardware-assisted verification for designs over 60 billion gates using AMD’s Versal Premium VP1902 SoC.

Revolutionary Performance Gains

The newly released systems represent a significant leap in verification capabilities, with the ZeBu-200 platform delivering up to 2x performance improvement over previous generations [1][3]. This emulation system can handle designs of up to 15.4 billion gates [1], while the complete solution scales beyond 60 billion gates for multi-die designs [4]. The HAPS-200 prototyping system shows equally impressive advances, featuring 4x improved debug performance compared to its predecessor [1][5].

Industry Impact and Adoption

Major industry leaders including AMD, Arm, NVIDIA, and SiFive are already implementing these new verification technologies [3]. NVIDIA’s vice president of hardware engineering, Narendra Konda, has reported achieving 50 MHz performance with HAPS-200, significantly boosting their software development team’s productivity [3][4]. The systems’ introduction comes at a crucial time, as the semiconductor industry approaches designs with hundreds of billions of gates per chip [3].

Advanced Technical Capabilities

Built on the AMD Versal Premium VP1902 adaptive SoC [1], both systems utilize Synopsys’ EP-Ready Hardware platform for versatile configuration options [2]. The HAPS-200 supports mixed system setups scalable from a single FPGA to multi-rack configurations, with a maximum capacity of 10.8 billion gates [4][5]. A notable innovation is the integration of Synopsys Virtualizer with multi-threading technology, enabling full Android boot in under 10 minutes [3].

Availability and Market Position

Both the HAPS-200 prototyping system and the ZeBu-200 emulation system are currently available [4], with early access programs already in progress for select customers [5]. These systems represent Synopsys’ response to the increasing complexity of semiconductor design verification, particularly as the industry moves toward more sophisticated AI and multi-die systems [3][4].

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verification systems semiconductor design